Taiwan chip packaging investment rises as AI demand strains semiconductor capacity

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Taiwan chip packaging investment rises

Highlights

Advanced packaging is forecast to generate more revenue than traditional chip packaging in 2026, with industry capital spending expected to approach $28 billion.
TSMC's advanced packaging capacity constraints are prompting Nvidia to provide billions of dollars in financing to expand capacity at ASE Technology's SPIL unit.
AMD has announced investments exceeding $10 billion in Taiwan's semiconductor sector, including advanced packaging partnerships with ASE, SPIL, and Powertech Technology.

Advanced packaging becomes a strategic bottleneck

As reported by Reuters, semiconductor companies and equipment makers are expanding investment in advanced packaging as demand for AI chips outpaces available capacity. Interviews with more than a dozen industry executives and analysts indicate that players from Nvidia and AMD to smaller Taiwanese suppliers are increasing production and developing new tools to ease the constraint.

Former Intel chief executive Pat Gelsinger, now a partner at Playground Global, says packaging was once an area the industry paid little attention to. He estimates advanced packaging could eventually account for as much as half the value of a chip product, as some current graphics and central processing units integrate 10 or more chips, and sometimes as many as 20.

Research firm Yole Group says revenue from advanced packaging is forecast to overtake that from the traditional route for the first time in 2026, with capital spending on the technology expected to approach $28 billion. The change reflects a broader manufacturing shift as chip designers use packaging to connect processors and memory into a single high-speed system, rather than mainly protecting chips and linking them to circuit boards.

Taiwan suppliers seek gains from capacity shortages

TSMC remains the dominant provider of the most sophisticated advanced packaging technology, including chip-on-wafer-on-substrate, or CoWoS, which is widely used by Nvidia, AMD, Broadcom and cloud companies building their own AI chips. The technology connects separate pieces of silicon on a shared base so they can work together at high speed, an increasingly important function for AI chips that must move large volumes of data between processors and nearby memory.

TSMC's capacity constraints are opening space for other suppliers. An industry executive familiar with the matter says Nvidia is providing billions of dollars in financing to expand CoWoS packaging capacity at Siliconware Precision Industries, or SPIL, a unit of Taiwan's ASE Technology.

Powertech Technology is also positioning itself as customers look for alternatives to TSMC. Chairman D K Tsai told reporters in August that customers do not want to rely entirely on TSMC, and the company is betting on panel-level packaging, which uses larger rectangular panels instead of round wafers to fit more chips into each production run and reduce material waste. TSMC is also developing its own panel-based technology, called chip-on-panel-on-substrate, or CoPoS, while AMD has unveiled investments of more than $10 billion across Taiwan's semiconductor industry, including partnerships with ASE, SPIL and Powertech on advanced packaging.

Our earlier analysis of the Nasdaq 100’s volatility highlighted how worries about AI supply chains and higher financing costs pressured semiconductor and AI-related shares, even after a short rebound. We also noted the index remained below key moving averages, with mixed momentum and oversold signals, meaning sentiment was still fragile and traders were watching major resistance levels for confirmation of any recovery.

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